Cortex-M7 Family RAM/ROM Requirements

All CMX Functions: 2668
CMX Initialize Module: 843
CMX Scheduler: 684

CMX Functions are contained in a library, thus reducing code size, if not referenced.
The above ROM figures are in number of bytes.
RAM, Each Task Control Block: 64 Bytes
Min. Context Switch: 165 cycles + 21 cycles for saving floating point registers
Max. Interrupt Latency: 83 cycles

"Min. Context Switch" is based on the current task having its context saved and the highest priority user task becoming the new running task.

"Max. Interrupt Latency" is the worst case interrupt latency scenario that the CMX RTOS can introduce. Usually the latency times will be shorter.

Call, fax, or e-mail us with any additional questions that you may have.

All content is subject to change without notice
Copyright material 2014© All Rights Reserved. Site and all contents are the sole property of CMX Systems, Inc.
No part of this site may be copied or used without the express written permission of the owner.
Web Services by Unicorn Web Development, Inc.